Verification Methodology Manual for SystemVerilog
Format: Print Book
ISBN: 9781461498131
Tax included.
Offers users the first resource guide that combines both the methodology and basics of SystemVerilog
Addresses how all these pieces fit together and how they should be used to verify complex chips rapidly and thoroughly.
Unique in its broad coverage of SystemVerilog, advanced functional verification, and the combination of the two.
Publication Year: 2006
Imprint: Springer US
Format: P
Weight (Gram): 795
